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 INTEGRATED CIRCUITS
DATA SHEET
TEA1096; TEA1096A Speech and listening-in IC
Product Specification File under Integrated Circuits, IC03 November 1994
Philips Semiconductors
Philips Semiconductors
Product Specification
Speech and listening-in IC
FEATURES * Line Interface with: - active set impedance (adjustable) - voltage regulator with adjustable DC voltage - low voltage circuit for parallel operation * Interface to peripheral circuits with: - supply VDD for microcontroller - stabilized supply voltage (VBB) which is: available for peripheral circuits adjustable (TEA1096 only) - Dual-Tone MultiFrequency (DTMF) signal input - power-down function for pulse dialling/flash - mute function to disable speech during dialling * Microphone amplifier with: - symmetrical high impedance inputs - externally adjustable gain - AGC; line-loss compensation - dynamic limiter - microphone mute function * Receiving amplifier with: - externally adjustable gain - confidence tone during dialling - double anti-sidetone circuit for long and short lines - AGC; line-loss compensation - earpiece protection by soft clipping. * Listening-in circuit with: - loudspeaker amplifier - dynamic limiter to prevent distortion at any supply condition - volume control via a potentiometer - fixed gain of 35.5 dB - disable function - gain control input (TEA1096A only). ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TEA1096 TEA1096A TEA1096T TEA1096AT November 1994 DIP28 DIP28 SO28 SO28 DESCRIPTION APPLICATIONS
TEA1096; TEA1096A
* Line-powered telephone sets with listening-in/line monitoring function. DIFFERENCES BETWEEN TEA1096 AND TEA1096A The TEA1096 offers via input VBA an adjustable stabilized supply voltage VBB, whereas the TEA1096A offers a fixed stabilized voltage VBB. The TEA1096A offers a DC gain control input VCI to set the loudspeaker volume, whereas the TEA1096 offers volume control via a potentiometer. GENERAL DESCRIPTION The TEA1096 and TEA1096A are bipolar ICs intended for use in line powered telephone sets. They offer a speech/transmission function, listening-in and line monitoring facilities of the received line signal via the loudspeaker. The devices incorporate a line interface block, a microphone and DTMF amplifier, a receiving amplifier, a supply function, a loudspeaker amplifier, and a dynamic limiter in the transmission channel and the listening-in channel.
VERSION SOT117-1 SOT117-1 SOT136-1 SOT136-1
plastic dual in-line package; 28 leads (600 mil) plastic dual in-line package; 28 leads (600 mil) plastic small outline package; 28 leads; body width 7.5 mm plastic small outline package; 28 leads; body width 7.5 mm 2
Philips Semiconductors
Product Specification
Speech and listening-in IC
QUICK REFERENCE DATA SYMBOL Iline IDD IDD(PD) PARAMETER line current CONDITIONS normal condition with reduced performance current consumption from pin VDD PD = LOW during normal operation current consumption from capacitor CVDD during power-down current consumption from capacitor CVBB during power-down stabilized voltage (line interface) supply voltage for microcontroller RDD = 390 ; IP = 0 mA RDD = 390 ; IP = 1 mA VBB Gvtx stabilized supply voltage voltage gain from pin MICP or MICM to LN voltage gain adjustment with RGAS voltage gain from pin LN to QRP or QRM voltage gain adjustment with RGAR line-loss compensation voltage gain from pin LSI to QLS maximum output voltage swing on pin LN (peak-to-peak value) output voltage between pins QLS and VEE (peak-to-peak value) operating ambient temperature RAGC = 100 k VLSI = 10 mV (RMS) Vline = 50 mV (RMS); RGAR = 90.9 k; Iline = 20 mA VMIC = 2 mV (RMS); RGAS = 90.9 k; Iline = 20 mA PD = HIGH - - -
TEA1096; TEA1096A
MIN. 15 - -
TYP.
MAX. 140 15 2.9 150
UNIT mA mA mA A
2.4 100
IBB(PD)
PD = HIGH
-
350
500
A
VSLPE VDD
4.2 - - 3.4 51
4.45 3.5 3.1 3.6 52
4.7 - - 3.8 53
V V V V dB
Gvtxr Gvrx
-19 -3.5
- -2.5
0 -1.5
dB dB
Gvrxr Gtrx Gvlx VLN(p-p) VQLS(p-p) Tamb
-12 5 34 - VLSI = 18 mV; Iline = 20 mA 2.5 -25
- 6 35.5 3.65 2.9 -
8 7 37 4.3 - +75
dB dB dB V mA C
November 1994
3
Philips Semiconductors
Product Specification
Speech and listening-in IC
BLOCK DIAGRAMS
TEA1096; TEA1096A
Fig.1 Block diagram (TEA1096).
November 1994
4
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
Fig.2 Block diagram (TEA1096A).
November 1994
5
Philips Semiconductors
Product Specification
Speech and listening-in IC
PINNING PINS SYMBOL TEA1096 DLL/DIL VBA VCI QLS REG VEE SLPE VBB AGC ILS LN Vref SIMP VDD DLS/MMUTE STAB OSP GAS MUTE DTMF PD MICM MICP BAL1 BAL2 QRP GAR QRM LSI 1 2 - 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 TEA1096A 1 - 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
TEA1096; TEA1096A
DESCRIPTION dynamic limiter and disable input for loudspeaker amplifier VBB voltage adjustment volume control input for loudspeaker amplifier loudspeaker amplifier output decoupling line voltage stabilizer negative line terminal (ground reference) stabilized voltage, connection for slope resistor stabilized supply voltage for listening-in circuitry automatic gain control input line signal positive line terminal reference voltage output set impedance input supply voltage for speech circuitry/peripherals dynamic limiter for sending and microphone mute reference current adjustment sending preamplifier output sending gain adjustment mute input to select speech or DTMF dialling dual-tone multi-frequency (DTMF) input power-down input inverting microphone amplifier input non-inverting microphone amplifier input connection for balance network 1 connection for balance network 2 non-inverting receiving amplifier output receiving gain adjustment inverting receiving amplifier output loudspeaker amplifier input
November 1994
6
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
Fig.3 Pin configuration (TEA1096).
Fig.4 Pin configuration (TEA1096A).
November 1994
7
Philips Semiconductors
Product Specification
Speech and listening-in IC
FUNCTIONAL DESCRIPTION Remark: all data given in this chapter are typical values except when otherwise specified. Supply pins SLPE, LN, VEE, VBB, VDD, REG and PD The supply for the TEA1096/TEA1096A and its peripherals is obtained from the telephone line. The circuits regulate the line voltage and generate their own supply voltages VDD and VBB to power the transmission part and the loudspeaker amplifier respectively. As can be seen from Fig.5, the line current (Iline) is split between the sending output stage (Iln), the circuitry connected to SLPE (Isl), the transmission circuit (IDD), the peripheral circuits (Ip) and the current switch (ISUP). It can be shown that: ISUP = Iline - (Iln + Isl + IDD + IP) With nominal conditions where: Iln = 5 mA, Isl = 0.3 mA and IDD = 2.4 mA it therefore follows that ISUP Iline - 7.7 mA - IP.
TEA1096; TEA1096A
The remaining current ISUP is available for the listening-in part. The current consumption IBB0 of the listening-in circuitry is 2.5 mA. To power the loudspeaker, the line current has to be more than 10 mA. The voltage at SLPE is stabilized at 4.45 V nominal. The DC line voltage is regulated at: VLN = VSLPE + RSLPE x (Iline - Iln). The supply voltage for the transmission part and peripheral circuits (VDD) is generated from VSLPE and is equal to VDD = VSLPE - RDD x (IDD + Ip). VBB supplies the listening-in circuitry and is stabilized at 3.6 V nominal. A resistor connected between pin REG and VEE can be used to decrease the SLPE voltage while maintaining VBB at its nominal value, whereas a resistor connected between pin REG and pin SLPE will increase the SLPE voltage while maintaining VBB at its nominal value. When adjusting the SLPE voltage to a lower value, care should be taken that the VSLPE is at least 0.4 V higher than VBB (VBB supply efficiency).
Fig.5 Supply arrangement.
November 1994
8
Philips Semiconductors
Product Specification
Speech and listening-in IC
The function of the current switch TR1-TR2 is to reduce distortion of large line signals. Current ISUP is supplied to VBB via TR1, when VSLPE is higher than VBB + 0.4 V. When VSLPE is lower, this current is shunted to VEE via TR2. All excess line current, not used for internal supply is consumed in the VBB stabilizer or directly shunted to VEE. To reduce the current consumption during pulse dialling, the TEA1096/TEA1096A are provided with a power-down (PD) input. The PD input has a pull-down structure. When the voltage on PD is HIGH, the current consumption from VDD capacitor CVDD is 100 A and from the VBB supply point 350 A. The capacitors CVDD (100 F) and CVBB (470 F) are sufficient to power theTEA1096/TEA1096A during pulse dialling/flash. VBB voltage adjustment: pin VBA (TEA1096 only) A resistor connected between pins VBA and VEE can be used to increase the VBB voltage, whereas a resistor connected between pins VBA and VBB will decrease the VBB voltage. When adjusting the VBB voltage to a higher value, care should be taken that VSLPE is at least 0.4 V higher than VBB (VBB supply efficiency).
TEA1096; TEA1096A
Sending channel: pins MICP, MICM, DTMF, GAS, OSP, LN, MUTE, DLS and AGC The TEA1096/TEA1096A has symmetrical microphone inputs MICP, MICM with an input resistance of 64 k between MICP and MICM (2 x 32 k). In the speech mode (MUTE = LOW), the overall gain from MICP-MICM to LN can be adjusted from 33 dB to 52 dB to suit specific requirements. The gain is proportional to the value of RGAS and equals 52 dB with RGAS = 90.9 k and Iline = 20 mA. A capacitor CGAS connected in parallel with RGAS can be used to provide a first-order low-pass filter. Automatic gain control (AGC) is provided for line-loss compensation as well as dynamic limitation for reduction of the distortion of the transmitted signal on the line. The microphone amplifier can be disabled by short-circuiting pin DLS to VEE (secret function) and can be muted into DTMF mode by applying a HIGH level on pin MUTE. The TEA1096/TEA1096A has an asymmetrical DTMF input with an input resistance of 20 k. In the DTMF mode, the overall gain from DTMF to LN is proportional to RGAS, and is 26.5 dB less than the microphone amplifier gain. Switch-over from one mode to the other is click-free.
Fig.6 Sending channel.
November 1994
9
Philips Semiconductors
Product Specification
Speech and listening-in IC
It can be calculated from Fig.7 that the AC modulator gain can be written: Z line V LN * ------------- = ----------------------------------------------------- = 12 providing ( Z line + Z SET ) x 24 V OSP ZSET = Z line * Gv (LN to OSP) = 21.6 dB. The frequency response for audio frequencies of the sending channel is flat in this case for a complex line termination. Set impedance: pins ILS, SIMP and LN The TEA1096/TEA1096A provides an active set impedance in both the receiving and sending conditions, thus allowing a flat frequency response for a complex line impedance, without the need for any extra compensation network. As can be derived from Fig.8 the set impedance ZSET is 10 times lower than ZSIMP.
TEA1096; TEA1096A
Fig.7 AC modulator equivalent model.
Fig.8 Set impedance.
November 1994
10
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
Fig.9 Equivalent AC impedance between LN and VEE. The equivalent impedance connected between LN and VEE is illustrated in Fig.9. Where: * LEQ = REQ x CREG x RSLPE * REQ = 40 k * ZSET = 110ZSIMP. Remark: a resistor R (REG-VEE) connected between REG and VEE (to lower the regulated voltage) changes REQ into REQ // R (REG-VEE), whereas a resistor RREG-SLPE connected between REG and SLPE (to increase the regulated voltage) has no effect on REQ. Dynamic limiter of the microphone channel: pin DLS The dynamic limiter in the microphone channel of the TEA1096/TEA1096A prevents clipping of the microphone signal, and limits the transmitted signal on LN to a maximum value of typically 3.65 V (4.4 dBm). Clipping on the microphone channel is prevented by rapidly reducing the gain when the output stage starts to saturate. The time in which the gain reduction is effected (clipping attack time) is approximately a few milliseconds. The microphone channel stays in the reduced gain mode until the peaks of the signal no longer cause saturation. The gain of the microphone channel then returns to its normal value within the clipping release time. Both attack and release time are proportional to the value of the capacitor CDLS. The THD (Total Harmonic Distortion) of the microphone amplifier in the reduced gain mode stays below 2% up to 10 dB of input voltage overdrive [provided that VMICP, VMICM is below 10 mV (RMS)]. The dynamic limiter of the TEA1096/TEA1096A also provides a microphone mute (secret function) when pin DLS is short-circuited to VEE. The microphone gain is then 80 dB lower. The release time after a microphone mute is approximately 10 ms.
November 1994
11
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
Fig.10 Dynamic limiter of the microphone channel.
Receiving amplifier: pins LN, GAR, QRP and QRM The receiver gain is defined between the line connection LN and the earpiece complementary outputs QRP (non-inverting) and QRM (inverting). With RGAR equal to 90.9 k the gain from LN to QRP is -2.5 dB. The outputs may be used to connect a dynamic, magnetic or piezoelectric earpiece. When the earpiece impedance exceeds 450 , differential drive (BTL connection) can be used. As both outputs are in opposite phase, the gain from LN to QRP or QRM is 3.5 dB. By means of the RGAR resistor, the gain of the receiving amplifier can be adjusted to suit the sensitivity of the transducer which is used. The permitted range is between -14 dB and +6 dB for single-ended drive (SE), and between -8 dB and +12 dB for bridge-tied load (BTL) drive. Two external capacitors, CGAR (100 pF) and CGARS (1 nF), ensure stability. The CGAR capacitor is also used to obtain a first-order low-pass filter. The cut-off frequency (corresponding to the time constant RGAR x CGAR) can be adjusted by the CGAR capacitor, but the relationship CGARS = CGAR x 10 must be maintained. During DTMF dialling, the dialling tones can be heard in the earpiece at a very low level. This is called confidence tone.
Automatic gain control: pin AGC Automatic compensation of line-loss is obtained by connecting a resistor RAGC between pin LN and pin AGC. This automatic gain control changes the gain of the microphone and receiving amplifiers in accordance with the DC line current. The control range is 6 dB; This corresponds to a 5 km line of 0.5 mm diameter copper twisted-pair cable: DC resistance = 176 /km average attenuation = 1.2 dB/km. The value of RAGC must be chosen with reference to the exchange supply voltage and its feeding bridge resistance and has no influence on the ratio (Istart/Istop) which remains constant. Figure11 illustrates the gain attenuation when RAGC = 100 k. If automatic line-loss compensation is not required, the AGC pin can be left open circuit, the amplifiers then give their maximum gain and the double sidetone principle is no longer active. Only one network is used. Pins BAL1 and BAL2 must then be short-circuited together.
November 1994
12
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In the event of real impedances, the anti-sidetone network is composed of resistors connected as shown in Fig.13.
November 1994 To reach this requirement, an anti-sidetone network using two impedances ZBAL and ZLI' is needed. Suppression of the microphone signal in the earpiece is obtained by subtracting a part of this signal to a fraction of the line signal (see Fig.12). For optimum suppression, the voltage at the BAL inputs (BAL1 and BAL2) should be equal to: Z line V BAL = 0.5 x ------------------------------ x V SOP Z SET x Z line Sidetone suppression: pins BAL1, BAL2, OSP and ILS Philips Semiconductors
Speech and listening-in IC
Fig.11 Variation of microphone and receiver gain as a function of the exchange supply voltage with RAGC as a parameter.
13 The components of Zp, scaled by a factor , are applied in anti-sidetone network ZLI'. The complete anti-sidetone network is shown in Fig.15. In the event of complex impedances, the equivalent network Zs, representing Zline, has to be transformed into Zp in accordance with Fig.14. where is a scale factor allowing to have RLI' in the order of 10 k (DC biasing to Vref has to be ensured on BAL1 and BAL2). Where: RLI' = x Rline and RBAL = x RSET;
TEA1096; TEA1096A
Product Specification
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
Fig.12 Balance networks connection.
(a) Series impedance (Zs). (b) Parallel impedance (Zp).
Fig.13 Anti-sidetone network.
Fig.14 Equivalent network.
November 1994
14
BBB BBB
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
Switching from one network to the other is carried out continuously with the line current, when the RAGC resistor is connected. When the RAGC resistor is not connected, switching from one network to the other is not possible (see automatic gain control). Only one network has then to be applied. It is also possible to use only one anti-sidetone network. In this event, both inputs BAL1 and BAL2 must be short-circuited. Loudspeaker amplifier: pins LSI and QLS The loudspeaker amplifier has an asymmetrical input LSI which is referenced to an internal voltage reference of 1.25 V via an internal resistance of 10 k. The input signal can be taken from one of the earpiece outputs QRP or QRM via a potentiometer (RPOT). The attenuation has to be chosen in accordance with the gain Gvrx of the receiving amplifier.
Fig.15 Complete anti-sidetone network.
The input stage can handle up to 200 mV (RMS) at room temperature for 3% of THD. The gain of the loudspeaker amplifier is fixed at 35.5 dB. The output QLS is referenced to a DC level of 12VBB to offer rail-to-rail output swing. The maximum voltage gain from line to loudspeaker has to be fixed in relation to the side-tone transfer of the telephone set. An enlarged listening-in gain improves the listening-in behaviour but can introduce audible instabilities in the form of howling during normal use of the set. The loudspeaker can be disabled by short-circuiting DLL/DIL input to VEE.
Again, it means that: ZLI' = x Zline and ZBAL = x ZSET Where is a scale factor allowing ZLI' to be in the order of 10 k (DC biasing to Vref has to be ensured on BAL1 and BAL2). As the line impedance Zline varies considerably with the line length, two anti-sidetone networks can be used. One of them ZLl', connected to BAL2 is optimized for long lines, the other one ZLs', connected to BAL1 is optimized for short lines: Where: ZLl' = x Zline (long) ZLs' = x Zline (short) ZBAL1 = x ZSET ZBAL2 = x ZSET.
November 1994
15
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
Fig.16 Loudspeaker amplifier channel.
Dynamic limiter/loudspeaker amplifier disabling; pin DLL/DIL The dynamic limiter in the loudspeaker channel of the TEA1096/TEA1096A prevents clipping of the loudspeaker output stage and protects the functioning of the circuit when low supply conditions are detected. Hard clipping of the loudspeaker output stage is prevented by rapidly reducing the gain when the output stage starts to saturate. The time in which the gain reduction is effected (clipping attack time) is approximately a few milliseconds. The loudspeaker amplifier stays in the reduced gain mode until the peaks of the loudspeaker signals no longer start to cause saturation. The gain of the loudspeaker amplifier then returns to its normal value within the clipping release time. Both attack and release time are proportional to the value of the capacitor CDLL. The THD of the loudspeaker amplifier in the reduced gain mode stays below 5% up to 10 dB of input voltage overdrive.
When the supply conditions drop below the required level, the gain of the loudspeaker amplifier is reduced in order to prevent the device from malfunctioning. When the supply current drops below the required level, the supply voltage VBB decreases. In this condition, the gain of the loudspeaker amplifier is reduced slowly (approximately a few seconds). When the supply voltage continues to decrease and drops below an internal threshold of 2.8 V, the gain of the loudspeaker amplifier is rapidly reduced (approximately 1 ms). After returning to normal supply conditions, the gain of the loudspeaker amplifier is raised again. The dynamic limiter also provides a loudspeaker disable when pin DLL/DIL is short-circuited to VEE. The loudspeaker gain is then typically 80 dB lower. The release time is approximately 10 ms.
November 1994
16
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
Fig.17 Dynamic limiter of the listening-in part. x K x V BB Where V VCI = -------------------------------------1 - x ( 1 - K) R1 with = duty cycle and K = --------------------R1 + R2 A typical response is given in Fig.19.
Volume control: pin VCI (TEA1096A only) The TEA1096A is provided with a volume control input VCI, to adjust the gain of the loudspeaker channel by means of a controlled DC voltage. A typical application is illustrated in Fig.18. A pulse width modulation on a microcontroller open drain output imposes a DC voltage on the VCI capacitor:
Fig.18 Digital volume control application.
November 1994
17
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
Fig.19 Change of loudspeaker gain as a function of the voltage at VCI.
November 1994
18
Philips Semiconductors
Product Specification
Speech and listening-in IC
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOLS VLN VDD VBB Vn1 Vn2 Vn3 PARAMETER voltage on pin LN voltage on pin VDD voltage on pin VBB voltage on pins: REG, SLPE, AGC and ILS voltage on pins: DLL, VBA or VCI, QLS, LSI voltage on pins: Vref, SIMP, STAB, DLS, OSP, GAS, MUTE, DTMF, PD, MICM, MICP, BAL1, BAL2, QRP, QRM, GAR line current total power dissipation: TEA1096/TEA1096A TEA1096T/TEA1096AT Tstg Tamb storage temperature operating ambient temperature see also Figs 20 and 21 Tamb = +75 C; see Figs 20 and 21 CONDITIONS
TEA1096; TEA1096A
MIN. VEE - 0.4 VEE - 0.4 VEE - 0.4 VEE - 0.4 VEE - 0.4 VEE - 0.4
MAX. 12.0 12.0 12.0 VLN + 0.4 VBB + 0.4 VDD + 0.4 V V V V V V
UNIT
Iline Ptot
-
140
mA
- - -40 -25
0.91 0.66 +125 +75
W W C C
THERMAL CHARACTERISTICS SYMBOLS Rth j-a PARAMETER thermal resistance from junction to ambient in free air: TEA1096; TEA1096A TEA1096T; TEA1096AT (note 1) Note 1. Mounted on epoxy board 40.1 x 19.1 x 1.5 mm. 55 75 K/W K/W VALUE UNIT
November 1994
19
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November 1994 Philips Semiconductors
Speech and listening-in IC
(1) (2) (3) (4) (5)
(1) Tamb = 55 C; Ptot = 1272 mW. (2) Tamb = 65 C; Ptot = 1091 mW. (3) Tamb = 75 C; Ptot = 910 mW.
Tamb = 35 C; Ptot = 1199 mW. Tamb = 45 C; Ptot = 1066 mW. Tamb = 55 C; Ptot = 933 mW. Tamb = 65 C; Ptot = 800 mW. Tamb = 75 C; Ptot = 667 mW.
Fig.21 TEA1096T; TEA1096AT safe operating area.
Fig.20 TEA1096; TEA1096A safe operating area.
20
TEA1096; TEA1096A
Product Specification
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
CHARACTERISTICS Iline = 20 mA; IP = 0 mA; VEE = 0 V; PD = LOW; MUTE = LOW; Zline = 600 ; ZSIMP = 6 k; ZBAL1 = 18 k; ZLI' = 6 k; RSLPE = 20 ; RDD = 390 ; RGAS = 90.9 k; RGAR = 0.9 k; RQLS = 50 ; f = 1 kHz; Tamb = 25 C; measured in test circuit of Fig.22; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Line interface/supply (LN, SLPE, REG, VEE, VDD, VBB and Vref) VSLPE VSLPE(Iline) VSLPE(T) stabilized voltage (line interface) VSLPE variation with Iline VSLPE variation with temperature referenced to 25 C stabilized supply voltage VBB variation with Iline VBB variation with temperature referenced to 25 C current sunk by VBB shunt regulator when a line current equal to 20 mA is available internal current consumption from pin VDD supply voltage for speech and microcontroller Iline = 20 to 140 mA Tamb = -25 to +75 C IP = 0 mA; note 1 Iline = 20 to 140 mA Tamb = -25 to +75 C 4.2 - -150 4.45 30 60 4.7 - +150 V mV mV
VBB VBB(Iline) VBB(T) Isink
3.4 - -150 -
3.6 30 50 9.0
3.8 - +150 -
V mV mV mA
IDD VDD
IP = 0 mA; RDD = 390 RDD = 390 ; IP = 0 mA RDD = 390 ; IP = 1 mA
- - - -
2.4 3.5 3.1 0.5VDD 100 350 4.7 2.5 3.3
2.9 - - - 150 500 5.0 - -
mA V V V A A V V V
Vref IDD(PD) IBB(PD) VLN VLN
reference output voltage current consumption from CVDD during power-down condition current consumption from CVBB during power-down condition DC line voltage DC line voltage in low current conditions RDD = 390 ; IP = 0 mA; Iline = 4 mA RDD = 390 ; IP = 0 mA; Iline = 6 mA PD = HIGH; VDD = 4.3 V PD = HIGH; VBB = 3.5 V
- - 4.4 - -
Microphone amplifier (MICP, MICM, GAS, LN, and MUTE) |Zi1| |Zi2| Gvtx GvtxT input impedance between pins MICP or MICM and VEE input impedance between pins MICP and MICM voltage gain from pin MICP or MICM to LN voltage gain variation with temperature referenced to 25 C. VMIC = 2 mV (RMS); RGAS = 90.9 k VMIC = 2 mV (RMS); Tamb = -25 to +75 C 25.5 51 51 - 32 64 52 0.5 38.5 77 53 - k k dB dB
November 1994
21
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
SYMBOL Gvtxf Gvtxr Gtxm Gtxd
PARAMETER voltage gain variation with frequency referenced to 1 kHz voltage gain adjustment with RGAS gain reduction with MUTE = HIGH gain reduction when DLS/MMUTE is short-circuited to VEE maximum output voltage swing at pin LN (peak-to-peak value) noise output voltage at pin LN
CONDITIONS VMIC = 2 mV (RMS); f = 300 to 3400 Hz note 2 -
MIN.
TYP. 0.5 - 80 80 - 0 - -
MAX.
UNIT dB dB dB dB
-19 60 60
VLN(p-p) Vnotx
RGAS = 90.9 k
-
3.65 -72
4.3 -
V dBmp
pins MICP and MICM - short-circuited through 200 ; Psophometrically weighted (P53 curve) - - 40 -
CMRR
common mode rejection ratio
80
-
dB
Dynamic limiter for sending (DLS/MMUTE); related to the microphone amplifier clipping detector tatt trel THD attack time when VMIC jumps from 3.2 mV to 3.2 mV + 10 dB release time when VMIC drops from 3.2 mV + 10 dB to 3.2 mV total harmonic distortion RGAS = 90.9 k; CDLS = 470 nF RGAS = 90.9 k; CDLS = 470 nF VMIC = 3.2 mV + 10 dB; RGAS = 90.9 k; CDLS = 470 nF VMIC = 3.2 mV + 15 dB; RGAS = 90.9 k; CDLS = 470 nF Gvrx voltage gain from pin LN to QRP RGAR = 90.9 k; or QRM Vline = 50 mV (RMS); single-ended load; RQRP = 150 RGAR = 90.9 k; Vline = 50 mV (RMS); bridge tied load; RQRM = 450 GvrxT voltage gain variation with temperature referenced to 25 C. voltage gain variation with frequency referenced to 1 kHz voltage gain adjustment with RGAR Tamb = -25 to +75 C 1.5 120 2 5 - 3 ms ms %
-
3
10
%
Receiving amplifier (ILS, BAL1, BAL2, OSP, GAR, QRP, QRM and MUTE) -3.5 -2.5 -1.5 dB
2.5
3.5
4.5
dB
-
0.5
-
dB
Gvrxf Gvrxr
f = 300 to 3400 Hz
- -12
0.5 -
- 8
dB dB
November 1994
22
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
SYMBOL VQR(rms)
PARAMETER maximum output voltage for THD = 2% (RMS value)
CONDITIONS RGAR = 90.9 k; single-ended load; RQRP = 150 RGAR = 90.9 k; bridge-tied load; RQRM = 450 RGAR = 90.9 k; bridge-tied load with 300 series resistor; CQRM = 60 nF; f = 3400 Hz
MIN. 0.3
TYP. 0.375 -
MAX. V
UNIT
0.6
0.72
-
V
0.75
0.95
-
V
Vnorx(rms)
noise output voltage (RMS value)
Psophometrically weighted (P53 curve); single-ended load; RQRP = 150 Psophometrically weighted (P53 curve); bridge-tied load; RQRM = 450
-
90
-
V
-
180
-
V
DTMF amplifier (DTMF, LN, MUTE) |Zi| Gvtx GvtxT input impedance between pins DTMF and VEE voltage gain from pin DTMF to LN voltage gain variation with temperature referenced to 25 C voltage gain variation with frequency referenced to 1 kHz voltage gain from pin DTMF to QRP VDTMF = 4 mV (RMS); RGAS = 90.9 k VDTMF = 4 mV (RMS); Tamb = -25 to +75 C VDTMF = 4 mV (RMS); f = 300 to 3400 Hz MUTE = HIGH; Vline = 80 mV (RMS); RGAR = 90.9 k; RQRP = 150 Iline = 85 mA; RAGC = 100 k 16 24.5 - 20 25.5 0.5 24 26.5 - k dB dB
Gvtxf Gvtx
- -
0.5 -19
- -
dB dB
Automatic gain control (AGC); controlling the gain from LN to QRP, QRM and the gain from MICP, MICM to LN Gtrx gain control range for microphone and receiving amplifiers with respect to Iline = 20 mA highest line current for maximum gain lowest line current for minimum gain change of gain when varying Iline from 20 mA to 40 mA 5 6 7 dB
Iline(h) Iline(l) Gtrx
RAGC = 100 k RAGC = 100 k RAGC = 100 k
- - 1
28 66 1.5
- - 2
mA mA dB
November 1994
23
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Loudspeaker amplifier (LSI and QLS) |Zi| Gvlx GvlxT input impedance between pins LSI and VEE voltage gain from pin LSI to QLS voltage gain variation with temperature referenced to 25 C voltage gain variation with frequency referenced to 1 kHz output voltage between pins QLS and VEE (peak-to-peak value) noise output voltage at pin LN (RMS value) VLSI = 10 mV (RMS) Tamb = -25 to +75 C 8 34 - 10 35.5 0.5 12 37 - k dB dB
Gvlxf VQLS(p-p)
f = 300 to 3400 Hz VLSI = 18 mV; Iline = 16 mA VLSI = 18 mV; Iline = 20 mA pin LSI open-circuit; Psophometrically weighted (P53 curve)
- 1.2 2.5 -
0.5 1.45 2.9 200
- - - -
dB V V V
Vnolx(rms)
Dynamic limiter for the loudspeaker amplifier (DLL/DIL); related to the loudspeaker amplifier clipping detector THD tatt trel total harmonic distortion attack time when VLSI jumps from 18 mV to 18 mV + 0 dB release time when VLSI drops from 18 mV + 0 dB to 18 mV VLSI = 18 mV + 0 dB; Iline = 30 mA Iline = 30 mA; CDLL = 470 nF Iline = 30 mA; CDLL = 470 nF - - 30 2 1.5 60 5 5 - % ms ms
Dynamic limiter for the loudspeaker amplifier (DLL/DIL); related to the VBB threshold detector VBB(th) tatt VBB limiter threshold detector level attack time when VBB jumps below VBB(th) CDLL = 470 nF - - 2.8 1 - - V ms
Volume control for the loudspeaker amplifier (VCI) (TEA1096A only); related to the loudspeaker amplifier volume control |Zi| VVCImin input impedance minimum DC level on pin VCI for 0 dB control on loudspeaker amplifier Iline = 30 mA; VLSI = 10 mV (RMS) - - 1 2.8 - - M V
VVCI
DC level on pin VCI for -6 dB Iline = 30 mA; control on loudspeaker amplifier vLSI = 10 mV (RMS)
-
1.63
-
V
November 1994
24
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
SYMBOL
PARAMETER
CONDITIONS -
MIN. - - 6
TYP.
MAX.
UNIT
Power-down input (PD) VIL VIH IPD LOW level input voltage HIGH level input voltage input current in power-down condition PD = HIGH 0.5 10 V A 1.5 - VDD +0.4 V
Mute input (MUTE) VIL VIH IMUTE VIL Isink(DLS) trel Gtxm LOW level input voltage HIGH level input voltage input current MUTE = HIGH - 1.5 - - DLS/MMUTE = LOW CDLS = 470 nF DLS/MMUTE = LOW - - 60 - - 15 - 60 15 80 0.3 20 V A VDD +0.4 V
Microphone mute input (DLS/MMUTE) LOW level input voltage sink current release time after a LOW level on pin DLS/MMUTE gain reduction when DLS/MMUTE is short-circuited to VEE LOW level input voltage sink current release time after a LOW level on pin DLL/DIL gain reduction when DLL is short-circuited to VEE DLL/DIL = LOW Iline = 30 mA; CDDL = 470 nF DLL/DIL = LOW 0.3 100 - - V A ms dB
Disable input for loudspeaker amplifier (DLL/DIL) VIL Isink(DLL/DIL) trel Glm Notes 1. This gives the current available for receiving, listening-in and peripherals at this line current. 2. Both gains, microphone and sending DTMF, are determined in the same way by the resistor RGAS. HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. - - - 60 - 75 10 80 0.25 120 - - V A ms dB
November 1994
25
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
November 1994
26
Fig.22 Test diagram.
Philips Semiconductors
Product Specification
Speech and listening-in IC
APPLICATION INFORMATION
TEA1096; TEA1096A
November 1994
27
Fig.23 Basic application with a complex line impedance.
BBB BBBB BBBB B
Philips Semiconductors
Product Specification
Speech and listening-in IC
PACKAGE OUTLINES
TEA1096; TEA1096A
handbook, full pagewidth
seating plane
36.0 35.0 4.0 5.1 max max
15.80 15.24
3.9 3.4
0.51 min 0.254 M 0.32 max 15.24 17.15 15.90
MSA264
1.7 max
2.54 (13x) 1.7 max
0.53 max
28
15
14.1 13.7
1
14
Dimensions in mm.
Fig.24 Plastic dual in-line package; 28 leads (600 mil); DIP28; SOT117-1.
November 1994
28
Philips Semiconductors
Product Specification
Speech and listening-in IC
TEA1096; TEA1096A
handbook, full pagewidth
18.1 17.7
7.6 7.4 A
S 0.9 (4x) 0.4
0.1 S
10.65 10.00
28
15 2.45 2.25 1.1 1.0 0.3 0.1 0.32 0.23 1.1 0.5 detail A 2.65 2.35
pin 1 index 1 14 0 to 8o
MBC236 - 1
1.27
0.49 0.36
0.25 M (28x)
Dimensions in mm.
Fig.25 Plastic small outline package; 28 leads; body width 7.5 mm (SO28; SOT136-1).
November 1994
29
Philips Semiconductors
Product Specification
Speech and listening-in IC
SOLDERING Plastic dual in-line packages BY DIP OR WAVE The maximum permissible temperature of the solder is 260 C; this temperature must not be in contact with the joint for more than 5 s. The total contact time of successive solder waves must not exceed 5 s. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified storage maximum. If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron below the seating plane (or not more than 2 mm above it). If its temperature is below 300 C, it must not be in contact for more than 10 s; if between 300 and 400 C, for not more than 5 s. Plastic small outline packages BY WAVE During placement and before soldering, the component must be fixed with a droplet of adhesive. After curing the adhesive, the component can be soldered. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder bath is 10 s, if allowed to cool to less than 150 C within 6 s. Typical dwell time is 4 s at 250 C.
TEA1096; TEA1096A
A modified wave soldering technique is recommended using two solder waves (dual-wave), in which a turbulent wave with high upward pressure is followed by a smooth laminar wave. Using a mildly-activated flux eliminates the need for removal of corrosive residues in most applications. BY SOLDER PASTE REFLOW Reflow soldering requires the solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the substrate by screen printing, stencilling or pressure-syringe dispensing before device placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt, infrared, and vapour-phase reflow. Dwell times vary between 50 and 300 s according to method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 min at 45 C. REPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING
IRON OR PULSE-HEATED SOLDER TOOL)
Fix the component by first soldering two, diagonally opposite, end pins. Apply the heating tool to the flat part of the pin only. Contact time must be limited to 10 s at up to 300 C. When using proper tools, all other pins can be soldered in one operation within 2 to 5 s at between 270 and 320 C. (Pulse-heated soldering is not recommended for SO packages.) For pulse-heated solder tool (resistance) soldering of VSO packages, solder is applied to the substrate by dipping or by an extra thick tin/lead plating before package placement.
November 1994
30
Philips Semiconductors
Product Specification
Speech and listening-in IC
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TEA1096; TEA1096A
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
November 1994
31
Philips Semiconductors - a worldwide company
Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428) BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367 Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. (02)805 4455, Fax. (02)805 4466 Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213, Tel. (01)60 101-1236, Fax. (01)60 101-1211 Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands, Tel. (31)40 783 749, Fax. (31)40 788 399 Brazil: Rua do Rocio 220 - 5th floor, Suite 51, CEP: 04552-903-SAO PAULO-SP, Brazil. P.O. Box 7383 (01064-970). Tel. (011)821-2333, Fax. (011)829-1849 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS: Tel. (800) 234-7381, Fax. (708) 296-8556 Chile: Av. Santa Maria 0760, SANTIAGO, Tel. (02)773 816, Fax. (02)777 6730 Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17, 77621 BOGOTA, Tel. (571)249 7624/(571)217 4609, Fax. (571)217 4549 Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. (032)88 2636, Fax. (031)57 1949 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. (9)0-50261, Fax. (9)0-520971 France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. (01)4099 6161, Fax. (01)4099 6427 Germany: P.O. Box 10 63 23, 20043 HAMBURG, Tel. (040)3296-0, Fax. (040)3296 213. Greece: No. 15, 25th March Street, GR 17778 TAVROS, Tel. (01)4894 339/4894 911, Fax. (01)4814 240 Hong Kong: PHILIPS HONG KONG Ltd., 6/F Philips Ind. Bldg., 24-28 Kung Yip St., KWAI CHUNG, N.T., Tel. (852)424 5121, Fax. (852)428 6729 India: Philips INDIA Ltd, Shivsagar Estate, A Block , Dr. Annie Besant Rd. Worli, Bombay 400 018 Tel. (022)4938 541, Fax. (022)4938 722 Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4, P.O. Box 4252, JAKARTA 12950, Tel. (021)5201 122, Fax. (021)5205 189 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. (01)640 000, Fax. (01)640 200 Italy: PHILIPS SEMICONDUCTORS S.r.l., Piazza IV Novembre 3, 20124 MILANO, Tel. (0039)2 6752 2531, Fax. (0039)2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2 -chome, Minato-ku, TOKYO 108, Tel. (03)3740 5028, Fax. (03)3740 0580 Korea: (Republic of) Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. (02)794-5011, Fax. (02)798-8022 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. (03)750 5214, Fax. (03)757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TX 79905, Tel. 9-5(800)234-7381, Fax. (708)296-8556 Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB Tel. (040)783749, Fax. (040)788399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. (09)849-4160, Fax. (09)849-7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. (022)74 8000, Fax. (022)74 8341 Pakistan: Philips Electrical Industries of Pakistan Ltd., Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton, KARACHI 75600, Tel. (021)587 4641-49, Fax. (021)577035/5874546. Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc, 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. (02)810 0161, Fax. (02)817 3474 Portugal: PHILIPS PORTUGUESA, S.A., Rua dr. Antonio Loureiro Borges 5, Arquiparque - Miraflores, Apartado 300, 2795 LINDA-A-VELHA, Tel. (01)4163160/4163333, Fax. (01)4163174/4163366. Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. (65)350 2000, Fax. (65)251 6500 South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. (011)470-5911, Fax. (011)470-5494. Spain: Balmes 22, 08007 BARCELONA, Tel. (03)301 6312, Fax. (03)301 42 43 Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM, Tel. (0)8-632 2000, Fax. (0)8-632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. (01)488 2211, Fax. (01)481 77 30 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978, TAIPEI 100, Tel. (02)388 7666, Fax. (02)382 4382. Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, Bangkok 10260, THAILAND, Tel. (662)398-0141, Fax. (662)398-3319. Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. (0 212)279 2770, Fax. (0212)269 3094 United Kingdom: Philips Semiconductors LTD., 276 Bath road, Hayes, MIDDLESEX UB3 5BX, Tel. (081)73050000, Fax. (081)7548421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. (800)234-7381, Fax. (708)296-8556 Uruguay: Coronel Mora 433, MONTEVIDEO, Tel. (02)70-4044, Fax. (02)92 0601
For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BE-p, P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-724825 SCD35 (c) Philips Electronics N.V. 1994
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
413061/1500/01/pp32 Document order number: Date of release: November 1994 9397 743 10011
Philips Semiconductors


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